1. Field of the Invention
The present invention relates to a solid-state image capture device typified by a CMOS image sensor and to a camera system.
2. Description of the Related Art
In recent years, CMOS (complementary metal oxide semiconductor) image sensors have been attracting attention as solid-state image capture devices (image sensors) that replace CCDs.
This is because the CMOS image sensors have overcome the following problems of CCDs.
For example, typically, manufacture of pixels of CCDs necessitates a dedicated process and operation thereof necessitates multiple power supply voltages and a combination of peripheral ICs (integrated circuits). In addition, in the case of the CCDs, the system becomes complicated.
For the CMOS image sensors, a manufacturing process that is similar to that for typical CMOS integrated circuits can be used. In addition, the CMOS image sensors can be driven by a single power supply, and further, analog circuits and logic circuits manufactured using a CMOS manufacturing process can be disposed in the same chip.
Thus, the CMOS image sensors have some significant advantages, such as being able to reduce the number of peripheral ICs.
An output circuit of a CCD mainly employs a single channel configuration using an FD amplifier having a floating diffusion (FD).
In contrast, the CMOS image sensor has FD amplifiers for the respective pixels, and mainly employs a column-parallel output configuration in which one row in the pixel array is selected and outputs from the selected row are simultaneously read in a column direction.
This is because, with the FD amplifiers arranged in the pixels, it is difficult to gain a sufficient drive capability, which may necessitate a reduction in data rate. Thus, parallel processing is considered to be advantageous.
Such CMOS image sensors are widely used as image-capture devices in image-capture apparatuses, such as digital cameras, camcorders, monitor cameras, and vehicle-mounted cameras.
FIG. 1 is a diagram showing a typical configuration example of a CMOS image sensor in which pixels are arranged in a two-dimensional array.
A CMOS image sensor 10 shown in FIG. 1 includes a pixel array section 11, a pixel drive circuit (a row selection circuit: Vdec) 12, and a reading circuit (a column processing circuit: AFE) 13.
The pixel array section 11 has pixel circuits arranged in a matrix having M rows×N columns.
The row selection circuit 12 controls an operation of pixels arranged in an arbitrary row in the pixel array section 11. The row selection circuit 12 controls the pixels through reset control lines LRST, transfer control lines LTRG, and selection control lines LSEL.
The reading circuit 13 receives data of a pixel row, subjected to reading control performed by the row selection circuit 12, through signal output lines LSGN and outputs the received data to a subsequent signal processing circuit.
The reading circuit 13 includes a correlated double sampling (CDS) circuit and an analog-to-digital converter (ADC).
FIG. 2 is a diagram showing an example of a CMOS-image-sensor pixel circuit having four transistors.
This pixel circuit 20 has a photoelectric conversion element (which may simply be referred to as a “PD” hereinafter) 21 implemented by, for example, a photodiode. In addition, the pixel circuit 20 has four transistors, namely, a transfer transistor 22, a reset transistor 23, an amplification transistor 24, and a selection transistor 25 as active elements with respect to the single photoelectric conversion element 21.
The photoelectric conversion element 21 converts incident light into charge (electrons in this case) having an amount corresponding to the amount of the incident light.
The transfer transistor 22 is connected between the photoelectric conversion element 21 and a floating diffusion (which may simply be referred to as an “FD” hereinafter), and has a gate (a transfer gate) to which a transfer signal (a drive signal) TRG is supplied through the transfer control line LTRG.
Thus, the electrons resulting from the photoelectric conversion performed by the photoelectric conversion element 21 are transferred to the floating diffusion FD.
The reset transistor 23 is connected between a power supply line LVREF and the floating diffusion FD, and has a gate to which a reset signal RST is supplied through the reset control line LRST.
Thus, the potential of the floating diffusion FD is reset to the potential of the power-supply line LVREF.
A gate of the amplification transistor 24 is connected to the floating diffusion FD. The amplification transistor 24 is connected to a signal line 26 (LSGN shown in FIG. 1) via the selection transistor 25 to constitute a source follower together with a constant current source other than for the pixel section.
An address signal (a selection signal) SEL is supplied to a gate of the selection transistor 25 through the selection control line LSEL to thereby turn on the selection transistor 25.
When the selection transistor 25 is turned on, the amplification transistor 24 amplifies the potential of the floating diffusion FD and outputs a voltage corresponding to the amplified potential to the signal line 26. The voltage output from each pixel through the signal line 26 is then output to the reading circuit 13.
In a pixel reset operation, the transfer transistor 22 is turned on to transfer charge, stored in the photoelectric conversion element 21, to the floating diffusion FD for discharge.
In this case, charge in the floating diffusion FD has been pre-discharged to the power-supply side through turning on of the reset transistor 23 so that the charge in the photoelectric conversion element 21 can be received by the floating diffusion FD. Alternatively, while the transfer transistor 22 is on, the reset transistor 23 may be turned on in conjunction therewith to discharge the charge directly to the power supply side.
The above-described series of operations will be simply referred to as a “pixel reset operation” or a “shutter operation”.
On the other hand, in a reading operation, the reset transistor 23 is first turned on to reset the floating diffusion FD, and an output is output to the output signal line 26 through the selection transistors 25 turned on in the reset state. This output will be referred to as a P-phase output.
Next, the transfer transistor 22 is turned on to transfer charge, stored in the photoelectric conversion element 21, to the floating diffusion FD, and the resulting output is output to the output signal line 26. This output will be referred to as a D-phase output.
A circuit provided outside the pixel circuit determines a difference between the D-phase output and the P-phase output and cancels reset noise of the floating diffusion FD to provide an image signal.
The series of operations will simply be referred to as a “pixel reading operation”.
The row selection circuit 12 selectively drives the transfer control lines LTRG, the reset control lines LRST, and the selection control lines LSEL.
For example, a three-transistor configuration (3Tr type) or a five-transistor configuration (5Tr type), other than the four-transistor configuration (4Tr type), may also be used as the pixel circuit configuration.
The 3Tr-type pixel circuit does not have a transfer transistor for controlling transfer of charge from the photoelectric conversion element (PD) 21 to the floating diffusion FD in accordance with the potential of the transfer control line LTRG.
When a CMOS image sensor using the 4Tr-type pixel circuit is used to capture an image, the operation of each pixel is controlled in order of “PD reset”, “exposure”, “FD reset and signal reading”, and “PD-to-FD charge transfer and signal reading”.
When a CMOS image sensor using the 3Tr-type pixel circuit is used to capture an image, the operation of each pixel is controlled in order of “PD/FD reset”, “exposure”, “signal reading”, and “PD/FD reset and signal reading”.
As an exposure system for CMOS image sensors, a rolling shutter system and a global shutter system are available.
In the rolling shutter system, the reset, exposure, and reading operations for the pixels arranged in the same row are performed at the same time.
Compared to the global shutter system, the rolling shutter system is widely used since it can be realized with a simple configuration and its operation is simple.
Also, in a period of time in which reading is performed on a particular row, exposure can be simultaneously performed on another row. Thus, the rolling shutter system also has an advantage in that the frame rate can be easily increased.
However, since timings for performing image capture are different from each other depending on the row, an image can be distorted when a subject or a camera is in motion. In particular, when the rolling shutter system is used for high-resolution photography, a difference in the image-capture timing becomes large depending on the row and thus the amount of distortion can also be more likely to increase.
In contrast, in the global shutter system, the reset and exposure are simultaneously performed on all pixels. Thus, no image distortion occurs between the rows. However, compared to a case in which only the rolling shutter system is used, the configuration of the image-capture apparatus or the CMOS image sensor tends to become complicated.
For example, Japanese Unexamined Patent Application Publication No. 2008-11298 discloses a system for performing a global shutter operation by combining a liquid-crystal shutter with a CMOS image sensor using a typical pixel circuit as shown in FIG. 2.
In the disclosed configuration, the PDs of all pixels are reset while the liquid-crystal shutter is open, exposure is performed, and then the liquid-crystal shutter is closed. With this arrangement, the PD reset and the exposure are simultaneously performed on all pixels. Reading is sequentially performed for each row, as in the reading in the rolling shutter operation.
Providing an image-capture apparatus with a mechanical shutter or a flash, instead of the liquid-crystal shutter, can similarly achieve the global shutter system.
Such an approach involves independently performing exposure and reading, and thus the frame rate decreases.
Even for an image capture apparatus using the global shutter system, the rolling shutter system is often used for capturing relatively low-quality images intended for, for example, previewing on the image capture apparatus. The rolling shutter system is also advantageous in order to increase the frame rate.
Thus, even for a CMOS image sensor using the global shutter system, it is desirable that the CMOS image sensor is also capable of performing operation in the rolling shutter system.
As described above, in the rolling shutter operation, the row selection circuit (Vdec) 12 selects the pixels for each row.
Thus, the period of time in which each row is selected is severely limited by a desired resolution and frame rate.
For example, when a user wishes to take an image with an 8 M pixel resolution (2500 rows×3200 columns) at 15 fps (frames/second), about 26 μs is taken for the operation for one row. In this period of time, operations including “reset of PDs in the shutter row”, “reset of FDs in the row to be read and reading”, and “PD-to-FD charge transfer and reading” are performed.
In this case, the period of time for the operations of the PD reset, the transfer, and the FD reset which involve control of the control lines is set to about 0.5 to a few microseconds. Thus, the row selection circuit typically necessitates a sufficient drive capability for performing switching to the potential of the control lines within the set time.
On the other hand, the global shutter system involves simultaneous exposure of all pixels.
When the global shutter system is realized in combination with the liquid-crystal shutter or mechanical shutter, the PDs of all pixels are reset while the shutter is open.
In the global shutter system, after a predetermined exposure time passes, the shutter is closed so that no light is incident on the PDs of the pixels. By doing so, exposure of all pixels is simultaneously performed.
In the global shutter system, since the PDs of all pixels are simultaneously performed, all reset signals RST are switched at the same time.
Reading in the global shutter system is analogous to that in the rolling shutter system.
Next, a description will be given of an exposure system for a CMOS image sensor for obtaining a color image.
For a CMOS image sensor for obtaining a color image, there is a system in which a color filter array is provided on the pixel array to permit only light having a spectrum in a specific range to pass for each pixel.
An available example of the arrangement of the color filter array is a Bayer arrangement that is constituted by red (R), blue (B), and green (G) filters.
When light is made incident on the pixels through the color filters, the sensitivity of the photoelectric conversion elements (PDs) varies depending on a light spectrum, i.e., color. For example, when white light having the same amount of photon distribution in all spectra is made incident on the pixels, the number of electrons generated by the PDs varies depending on the color of the color filter through which the light passes.
Thus, when the storage times of all pixels are the same, signal processing is performed on signals output from the solid-state image capture device and an appropriate gain is applied to each color to obtain an appropriate color balance.
However, since the gain is applied, there is a problem in that noise is also amplified. Accordingly, Japanese Unexamined Patent Application Publication No. 11-224941 discloses a method for making the number of electrons generated by the PDs when white light is incident to be substantially equal even for pixels having different color filters. In this method, the exposure times are individually set for respective colors.
In such a case, in the rolling shutter system and in the global shutter system, the timings of the PD reset are controlled for the individual colors to vary the exposure times for the respective colors.